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evgMrm.h
1 /*************************************************************************\
2 * Copyright (c) 2010 Brookhaven Science Associates, as Operator of
3 * Brookhaven National Laboratory.
4 * Copyright (c) 2015 Paul Scherrer Institute (PSI), Villigen, Switzerland
5 * mrfioc2 is distributed subject to a Software License Agreement found
6 * in file LICENSE that is included with this distribution.
7 \*************************************************************************/
8 #ifndef EVG_MRM_H
9 #define EVG_MRM_H
10 
11 #include <vector>
12 #include <map>
13 #include <string>
14 
15 #include <stdio.h>
16 #include <dbScan.h>
17 #include <callback.h>
18 #include <epicsMutex.h>
19 #include <epicsTimer.h>
20 #include <errlog.h>
21 #include <epicsTime.h>
22 #include <generalTimeSup.h>
23 #include <epicsThread.h>
24 #include <epicsEvent.h>
25 #include <epicsMutex.h>
26 
27 #include <devLibPCI.h>
28 
29 #include "evgAcTrig.h"
30 #include "evgEvtClk.h"
31 #include "evgTrigEvt.h"
32 #include "evgMxc.h"
33 #include "evgDbus.h"
34 #include "evgInput.h"
35 #include "evgOutput.h"
36 #include "mrmDataBufTx.h"
37 #include "mrmtimesrc.h"
38 #include "mrmevgseq.h"
39 #include "mrmspi.h"
40 #include "configurationInfo.h"
41 #include "drvem.h"
42 
43 /*********
44  * Each EVG will be represented by the instance of class 'evgMrm'. Each evg
45  * object maintains a list to all the evg sub-componets i.e. Event clock,
46  * Software Events, Trigger Events, Distributed bus, Multiplex Counters,
47  * Input, Output etc.
48  */
49 class wdTimer;
50 class wdTimer1;
51 
52 class FCT;
53 
54 enum ALARM_TS {TS_ALARM_NONE, TS_ALARM_MINOR, TS_ALARM_MAJOR};
55 
56 class evgMrm : public mrf::ObjectInst<evgMrm>,
57  public TimeStampSource,
58  public MRMSPI
59 {
60 public:
61  struct Config {
62  const char *model;
63  unsigned numFrontInp,
64  numUnivInp,
65  numRearInp;
66  };
67 
68  evgMrm(const std::string& id,
69  const Config *conf,
70  bus_configuration& busConfig,
71  volatile epicsUInt8* const base,
72  const epicsPCIDevice* pciDevice);
73  ~evgMrm();
74 
75  void enableIRQ();
76 
77  /* locking done internally: TODO: not really... */
78  virtual void lock() const{};
79  virtual void unlock() const{};
80  epicsMutex m_lock;
81 
83  const std::string getId() const;
84  volatile epicsUInt8* getRegAddr() const;
85  MRFVersion version() const;
86  std::string getFwVersionStr() const;
87  std::string getSwVersion() const;
88  std::string getCommitHash() const;
89 
90  void enable(epicsUInt16);
91  epicsUInt16 enabled() const;
92 
93  bool getResetMxc() const {return true;}
94  void resetMxc(bool reset);
95  epicsUInt32 getDbusStatus() const;
96 
97  IOSCANPVT timeErrorScan() const { return ioScanTimestamp; }
98 
99  virtual void postSoftSecondsSrc();
100 
101  // event clock
102  epicsFloat64 getFrequency() const;
103 
104  void setRFFreq(epicsFloat64);
105  epicsFloat64 getRFFreq() const;
106 
107  void setRFDiv(epicsUInt32);
108  epicsUInt32 getRFDiv() const;
109 
110  void setFracSynFreq(epicsFloat64);
111  epicsFloat64 getFracSynFreq() const;
112 
113  // see ClockCtrl[RFSEL]
114  enum ClkSrc {
115  ClkSrcInternal=0,
116  ClkSrcRF=1,
117  ClkSrcPXIe100=2,
118  ClkSrcRecovered=4, // fanout mode
119  ClkSrcSplit=5, // split, external on downstream, recovered on upstream
120  ClkSrcPXIe10=6,
121  ClkSrcRecovered_2=7,
122  };
123  void setSource(epicsUInt16);
124  epicsUInt16 getSource() const;
125 
126  bool pllLocked() const;
127 
128  void setPLLBandwidth(epicsUInt16 pllBandwidth);
129  epicsUInt16 getPLLBandwidth() const;
130 
132  static void isr(evgMrm *evg, bool pci);
133  static void isr_pci(void*);
134  static void isr_vme(void*);
135  static void isr_poll(void*);
136  static void init_cb(CALLBACK*, int, void(*)(CALLBACK*), void*);
137  static void process_inp_cb(CALLBACK*);
138 
140  void tsHandler();
141  epicsUInt16 getTSGenerator() const;
142  void setTSGenerator(epicsUInt16 TSGen);
143 
145  void setEvtCode(epicsUInt32);
146 
147  // use w/ Object properties for which no getter is necessary
148  epicsUInt32 writeonly() const { return 0; }
149 
151  evgInput* getInput(epicsUInt32, InputType);
152  epicsEvent* getTimerEvent();
153  const bus_configuration* getBusConfiguration();
154 
155  CALLBACK irqExtInp_cb;
156 
157  unsigned char irqExtInp_queued;
158 
159  IOSCANPVT ioScanTimestamp;
160 
161  mrmDataBufTx m_buftx;
162 
163  void show(int lvl);
164 
165  const epicsPCIDevice* m_pciDevice;
166 
167 private:
168  const std::string m_id;
169  volatile epicsUInt8* const m_pReg;
170  const bus_configuration busConfiguration;
171 
172  epicsFloat64 m_RFref; // In MHz
173  epicsFloat64 m_fracSynFreq; // In MHz
174  unsigned m_RFDiv;
175  ClkSrc m_ClkSrc;
176  epicsUInt16 m_TSGenerator; //Timestamp Generator
177  void recalcRFDiv();
178 
179  EvgSeqManager m_seq;
180 
181  evgAcTrig m_acTrig;
182 
183  typedef std::vector<evgTrigEvt*> TrigEvt_t;
184  TrigEvt_t m_trigEvt;
185 
186  typedef std::vector<evgMxc*> MuxCounter_t;
187  MuxCounter_t m_muxCounter;
188 
189  typedef std::vector<evgDbus*> Dbus_t;
190  Dbus_t m_dbus;
191 
192  typedef std::map< std::pair<epicsUInt32, InputType>, evgInput*> Input_t;
193  Input_t m_input;
194 
195 public:
196  typedef Input_t::iterator inputs_iterator;
197  inputs_iterator beginInputs() { return m_input.begin(); }
198  inputs_iterator endInputs() { return m_input.end(); }
199 private:
200 
201  typedef std::map< std::pair<epicsUInt32, evgOutputType>, evgOutput*> Output_t;
202  Output_t m_output;
203 
204  epicsEvent m_timerEvent;
205 
206  epicsUInt32 shadowIrqEnable;
207 
208  // EVM only
209  mrf::auto_ptr<FCT> fct;
210  mrf::auto_ptr<EVRMRM> evru, evrd;
211 public:
212  EVRMRM* getEvruMrm() const { return evru.get(); } // EVRU MRM accessor
213  EVRMRM* getEvrdMrm() const { return evrd.get(); } // EVRD MRM accessor
214 };
215 
216 #endif //EVG_MRM_H
Modular Register Map Event Receivers.
Definition: drvem.h:97
User implementation hook.
Definition: object.h:460
Definition: mrmDataBufTx.h:20