9 #include <vxAtomicLib.h>
12 #include <epicsTypes.h>
13 #include <epicsEndian.h>
23 epicsUInt16 sysIn16 (
volatile void*);
24 epicsUInt32 sysIn32 (
volatile void*);
25 void sysOut16 (
volatile void*, epicsUInt16);
26 void sysOut32 (
volatile void*, epicsUInt32);
33 #define bswap16(value) ((epicsUInt16) ( \
34 (((epicsUInt16)(value) & 0x00ff) << 8) | \
35 (((epicsUInt16)(value) & 0xff00) >> 8)))
37 #define bswap32(value) ( \
38 (((epicsUInt32)(value) & 0x000000ff) << 24) | \
39 (((epicsUInt32)(value) & 0x0000ff00) << 8) | \
40 (((epicsUInt32)(value) & 0x00ff0000) >> 8) | \
41 (((epicsUInt32)(value) & 0xff000000) >> 24))
43 #if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
44 # define be16_to_cpu(X) (X)
45 # define be32_to_cpu(X) (X)
46 # define le16_to_cpu(X) bswap16(X)
47 # define le32_to_cpu(X) bswap32(X)
49 #elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE
50 # define be16_to_cpu(X) bswap16(X)
51 # define be32_to_cpu(X) bswap32(X)
52 # define le16_to_cpu(X) (X)
53 # define le32_to_cpu(X) (X)
56 # error Unable to determine native byte order
59 #define ioread8(address) sysInByte ((epicsUInt32)(address))
60 #define iowrite8(address,data) sysOutByte ((epicsUInt32)(address), (epicsUInt8)(data))
62 #define nat_ioread16(address) sysIn16 ((address))
63 #define nat_ioread32(address) sysIn32 ((address))
65 #define nat_iowrite16(address,data) sysOut16(address,data)
66 #define nat_iowrite32(address,data) sysOut32(address,data)
68 #define be_ioread16(address) be16_to_cpu (sysIn16 ((address)))
69 #define be_ioread32(address) be32_to_cpu (sysIn32 ((address)))
71 #define be_iowrite16(address,data) sysOut16 ((address), be16_to_cpu((epicsUInt16)(data)))
72 #define be_iowrite32(address,data) sysOut32 ((address), be32_to_cpu((epicsUInt32)(data)))
74 #define le_ioread16(address) le16_to_cpu (sysIn16 ((address)))
75 #define le_ioread32(address) le32_to_cpu (sysIn32 ((address)))
77 #define le_iowrite16(address,data) sysOut16 ((address), le16_to_cpu((epicsUInt16)(data)))
78 #define le_iowrite32(address,data) sysOut32 ((address), le32_to_cpu((epicsUInt32)(data)))
80 #define rbarr() VX_MEM_BARRIER_R()
81 #define wbarr() VX_MEM_BARRIER_W()
82 #define rwbarr() VX_MEM_BARRIER_RW()