15 #define epicsExportSharedSymbols 20 volatile unsigned char* addr;
24 errlogPrintf(
"VME slot number out of range\n");
31 (
volatile void**)(
void*)&addr) )
34 errlogPrintf(
"Failed to map slot %d to CR/CSR address 0x%08lx\n",slot,
40 errlogPrintf(
"No card in slot %d\n",slot);
47 if( cr[0]!=
'C' || cr[1]!=
'R' ){
48 errlogPrintf(
"Card in slot %d has non-standard CR layout. Ignoring...\n",slot);
92 if(!addr)
return addr;
98 for(; devs && devs->
vendor; devs++){
99 if(csrMatch(devs,&test)){
121 volatile unsigned char* addr;
126 errlogPrintf(
"Slot number of of range (1-31)\n");
130 errlogPrintf(
"====== Slot %d\n",N);
142 printf(
"%02x", ((
int)*(addr+i))&0xff);
159 errlogPrintf(
"CR space id: ");
161 errlogPrintf(
"VME64\n");
163 errlogPrintf(
"VME64x\n");
165 errlogPrintf(
"Unknown (0x%02x)\n",space);
177 errlogPrintf(
"CSR CS : 0x%02x\n",ctrlsts);
182 errlogPrintf(
"CSR Bus Err : %s\n",(ctrlsts&
CSR_BITSET_BERR)?
"Yes":
"No");
187 errlogPrintf(
"User CR : %08x -> %08x\n",
189 errlogPrintf(
"User CSR : %08x -> %08x\n",
194 errlogPrintf(
"Serial Number: 0x");
196 errlogPrintf(
"%02x",
CSRRead8(addr + i));
208 errlogPrintf(
"Function %d\n",i);
210 errlogPrintf(
" Data AM : ");
214 errlogPrintf(
" Data XAM : ");
218 errlogPrintf(
" Data ADEM : ");
223 errlogPrintf(
" Data ADER : Base %08x Mod %02x\n",
224 (
unsigned int)ader&0xFfffFf00,(
int)(ader&0xff)>>2);
238 errlogPrintf(
">>> CSR/CR Dump\n");
245 errlogPrintf(
">>> CSR/CR Dump End\n");
#define CR_IEEE_OUI
IEEE Organizationally Unique Identifier (OUI)
#define CR_ROM_CHECKSUM
8-bit checksum of Configuration ROM space
#define CSR_BITSET_BERR
Module has asserted a Bus Error.
#define CSR_BAR
Base Address Register (MSB of our CR/CSR address)
#define devBusToLocalAddr
#define CSR_DATA_ACCESS_WIDTH
Control/Status Reg area (CSR) data access method.
#define CR_FN_ADEM(N)
Start of Address Decoder Mask (ADEM) registers.
#define CR_BEG_SN
Offset to beginning of board serial number.
#define CR_ROM_LENGTH
Number of bytes in Configuration ROM to checksum.
#define CR_SLAVE_CHAR
Board's slave-mode characteristics.
#define CR_ASCII_R
ASCII "R" (identifies this as CR space)
#define CSR_UD_BIT_SET
User-Defined Bit Set Register (for user-defined fns)
#define CR_ASCII_C
ASCII "C" (identifies this as CR space)
#define CSRSlotBase(slot)
Derives the CSR space base address for a slot.
#define VMECSRANY
Match any value. May be used in any field of VMECSRID.
void vmecsrprint(int N, int v)
Decode contents of CSR/CR and print to screen.
#define CSR_BITSET_CRAM_OWNED
CRAM is owned.
#define CR_END_SN
Offset to end of board serial number.
volatile unsigned char * devCSRTestSlot(const struct VMECSRID *devs, int slot, struct VMECSRID *info)
Probe a VME slot then check its ID.
#define CR_IRQ_CAP
Interrupt levels board can assert.
#define CR_END_UCSR
Offset to end of manufacturer-defined CSR space.
#define CSR_BITSET_RESET_MODE
Module is in reset mode.
ID info for a VME64(x) device This structure is used to hold identifying information for a VME64 comp...
#define CR_SPACE_ID
CR/CSR space ID (VME64, VME64X, etc).
#define CSR_BITSET_MODULE_ENA
Module is enabled.
#define CR_DATA_ACCESS_WIDTH
Configuration ROM area (CR) data access method.
#define CR_REVISION_ID
Manufacturer's board revision ID.
volatile unsigned char * devCSRProbeSlot(int slot)
Get the CSR base address for a slot.
#define VMECSRSLOTMAX
The highest slot number.
#define CR_BEG_UCSR
Offset to start of manufacturer-defined CSR space.
#define CR_CRAM_WIDTH
Configuration RAM (CRAM) data access method)
#define CSR_BITSET_SYSFAIL_ENA
SYSFAIL driver is enabled.
#define CSR_BITSET_MODULE_FAIL
Module has failed.
#define CR_BOARD_ID
Manufacturer's board ID.
#define CR_FN_DAWPR(N)
Start of Data Access Width Parameter (DAWPR) regs.
#define CR_FN_XAMCAP(N)
Start of Extended Address Mode Cap (XAMCAP) registers.
#define CSR_FN_ADER(N)
Function N Address Decoder Compare Register (1st byte)
#define CR_BEG_UCR
Offset to start of manufacturer-defined CR space.
#define CR_FN_AMCAP(N)
Start of Address Mode Capability (AMCAP) registers.
void vmecsrdump(int v)
Decode contents of CSR/CR for all cards and print to screen.
#define CSR_CRAM_OWNER
Configuration RAM Owner Register (0 = not owned)
#define CR_MASTER_CHAR
Board's master-mode characteristics.
#define CR_PROGRAM_ID
Program ID code for CR space.
#define CSR_BIT_SET
Bit Set Register (writing a 1 sets the control bit)
#define CR_IRQ_HANDLER_CAP
Interrupt levels board can respond to (handle)
long devReadProbe(unsigned wordSize, volatile const void *ptr, void *pValueRead)
#define CR_END_UCR
Offset to end of manufacturer-defined CR space.