| 
    devLib2
    2.12
    
   | 
 
Go to the source code of this file.
Macros | |
| #define | rbarr() do{}while(0) | 
| Explicit read memory barrier Prevents reordering of reads around it.  More... | |
| #define | wbarr() do{}while(0) | 
| Explicit write memory barrier Prevents reordering of writes around it.  More... | |
| #define | rwbarr() do{}while(0) | 
| Explicit read/write memory barrier Prevents reordering of reads or writes around it.  More... | |
| #define | be_ioread16(A) nat_ioread16(A) | 
| Read two byte in big endian order.  More... | |
| #define | be_ioread32(A) nat_ioread32(A) | 
| Read four byte in big endian order.  More... | |
| #define | be_iowrite16(A, D) nat_iowrite16(A,D) | 
| Write two byte in big endian order.  More... | |
| #define | be_iowrite32(A, D) nat_iowrite32(A,D) | 
| Write four byte in big endian order.  More... | |
| #define | le_ioread16(A) bswap16(nat_ioread16(A)) | 
| Read two byte in little endian order.  More... | |
| #define | le_ioread32(A) bswap32(nat_ioread32(A)) | 
| Read four byte in little endian order.  More... | |
| #define | le_iowrite16(A, D) nat_iowrite16(A,bswap16(D)) | 
| Write two byte in little endian order.  More... | |
| #define | le_iowrite32(A, D) nat_iowrite32(A,bswap32(D)) | 
| Write four byte in little endian order.  More... | |
| INLINE epicsUInt8 | ioread8 (volatile void *addr) | 
| Read a single byte.  More... | |
| INLINE void | iowrite8 (volatile void *addr, epicsUInt8 val) | 
| Write a single byte.  More... | |
| INLINE epicsUInt16 | nat_ioread16 (volatile void *addr) | 
| Read two bytes in host order. Not byte swapping.  More... | |
| INLINE void | nat_iowrite16 (volatile void *addr, epicsUInt16 val) | 
| Write two byte in host order. Not byte swapping.  More... | |
| INLINE epicsUInt32 | nat_ioread32 (volatile void *addr) | 
| Read four bytes in host order. Not byte swapping.  More... | |
| INLINE void | nat_iowrite32 (volatile void *addr, epicsUInt32 val) | 
| Write four byte in host order. Not byte swapping.  More... | |
| INLINE epicsUInt16 | bswap16 (epicsUInt16 value) | 
| INLINE epicsUInt32 | bswap32 (epicsUInt32 value) | 
| #define be_ioread16 | ( | A | ) | nat_ioread16(A) | 
Read two byte in big endian order.
| #define be_ioread32 | ( | A | ) | nat_ioread32(A) | 
Read four byte in big endian order.
| #define be_iowrite16 | ( | A, | |
| D | |||
| ) | nat_iowrite16(A,D) | 
Write two byte in big endian order.
| #define be_iowrite32 | ( | A, | |
| D | |||
| ) | nat_iowrite32(A,D) | 
Write four byte in big endian order.
| #define le_ioread16 | ( | A | ) | bswap16(nat_ioread16(A)) | 
Read two byte in little endian order.
| #define le_ioread32 | ( | A | ) | bswap32(nat_ioread32(A)) | 
Read four byte in little endian order.
| #define le_iowrite16 | ( | A, | |
| D | |||
| ) | nat_iowrite16(A,bswap16(D)) | 
Write two byte in little endian order.
| #define le_iowrite32 | ( | A, | |
| D | |||
| ) | nat_iowrite32(A,bswap32(D)) | 
Write four byte in little endian order.
| INLINE epicsUInt32 bswap32 | ( | epicsUInt32 | value | ) | 
Definition at line 102 of file epicsMMIODef.h.
| INLINE void iowrite8 | ( | volatile void * | addr, | 
| epicsUInt8 | val | ||
| ) | 
Write a single byte.
Definition at line 41 of file epicsMMIODef.h.
| INLINE epicsUInt16 nat_ioread16 | ( | volatile void * | addr | ) | 
Read two bytes in host order. Not byte swapping.
Definition at line 51 of file epicsMMIODef.h.
| INLINE epicsUInt32 nat_ioread32 | ( | volatile void * | addr | ) | 
Read four bytes in host order. Not byte swapping.
Definition at line 71 of file epicsMMIODef.h.
| INLINE void nat_iowrite16 | ( | volatile void * | addr, | 
| epicsUInt16 | val | ||
| ) | 
Write two byte in host order. Not byte swapping.
Definition at line 61 of file epicsMMIODef.h.
| INLINE void nat_iowrite32 | ( | volatile void * | addr, | 
| epicsUInt32 | val | ||
| ) | 
Write four byte in host order. Not byte swapping.
Definition at line 81 of file epicsMMIODef.h.
 1.8.13