11 #ifndef EPICSMMIODEF_H    12 #define EPICSMMIODEF_H    14 #include <epicsTypes.h>    20 #    define INLINE inline    34     return *(
volatile epicsUInt8*)(addr);
    43     *(
volatile epicsUInt8*)(addr) = val;
    53     return *(
volatile epicsUInt16*)(addr);
    63     *(
volatile epicsUInt16*)(addr) = val;
    73     return *(
volatile epicsUInt32*)(addr);
    83     *(
volatile epicsUInt32*)(addr) = val;
    86 #if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG    96     return (((epicsUInt16)(value) & 0x00ff) << 8)    |
    97            (((epicsUInt16)(value) & 0xff00) >> 8);
   104     return (((epicsUInt32)(value) & 0x000000ff) << 24)   |
   105            (((epicsUInt32)(value) & 0x0000ff00) << 8)    |
   106            (((epicsUInt32)(value) & 0x00ff0000) >> 8)    |
   107            (((epicsUInt32)(value) & 0xff000000) >> 24);
   110 #  define be_ioread16(A)    nat_ioread16(A)   111 #  define be_ioread32(A)    nat_ioread32(A)   112 #  define be_iowrite16(A,D) nat_iowrite16(A,D)   113 #  define be_iowrite32(A,D) nat_iowrite32(A,D)   115 #  define le_ioread16(A)    bswap16(nat_ioread16(A))   116 #  define le_ioread32(A)    bswap32(nat_ioread32(A))   117 #  define le_iowrite16(A,D) nat_iowrite16(A,bswap16(D))   118 #  define le_iowrite32(A,D) nat_iowrite32(A,bswap32(D))   122 #elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE   124 #include <arpa/inet.h>   127 #  include <rtems/endian.h>   137 #define bswap16(v) htons(v)   138 #define bswap32(v) htonl(v)   140 #  define be_ioread16(A)    bswap16(nat_ioread16(A))   141 #  define be_ioread32(A)    bswap32(nat_ioread32(A))   142 #  define be_iowrite16(A,D) nat_iowrite16(A,bswap16(D))   143 #  define be_iowrite32(A,D) nat_iowrite32(A,bswap32(D))   145 #  define le_ioread16(A)    nat_ioread16(A)   146 #  define le_ioread32(A)    nat_ioread32(A)   147 #  define le_iowrite16(A,D) nat_iowrite16(A,D)   148 #  define le_iowrite32(A,D) nat_iowrite32(A,D)   153 #  error Unable to determine native byte order   194 #define rbarr()  do{}while(0)   198 #define wbarr()  do{}while(0)   202 #define rwbarr() do{}while(0) INLINE void nat_iowrite16(volatile void *addr, epicsUInt16 val)
Write two byte in host order. Not byte swapping. 
 
INLINE epicsUInt32 bswap32(epicsUInt32 value)
 
INLINE epicsUInt32 nat_ioread32(volatile void *addr)
Read four bytes in host order. Not byte swapping. 
 
INLINE epicsUInt16 bswap16(epicsUInt16 value)
 
INLINE epicsUInt16 nat_ioread16(volatile void *addr)
Read two bytes in host order. Not byte swapping. 
 
INLINE void iowrite8(volatile void *addr, epicsUInt8 val)
Write a single byte. 
 
INLINE epicsUInt8 ioread8(volatile void *addr)
Read a single byte. 
 
INLINE void nat_iowrite32(volatile void *addr, epicsUInt32 val)
Write four byte in host order. Not byte swapping.