evgInit.cpp File Reference

#include <iostream>
#include <stdexcept>
#include <string>
#include <sstream>
#include <epicsExit.h>
#include <epicsThread.h>
#include <epicsStdio.h>
#include <epicsString.h>
#include <iocsh.h>
#include <drvSup.h>
#include <initHooks.h>
#include <errlog.h>
#include "mrf/object.h"
#include "mrf/databuf.h"
#include "mrf/pollirq.h"
#include "mrmpci.h"
#include <devcsr.h>
#include <mrfcsr.h>
#include <mrfCommonIO.h>
#include <devLibPCI.h>
#include "plx9030.h"
#include <epicsExport.h>
#include "evgRegMap.h"
#include "evgInit.h"

Include dependency graph for evgInit.cpp:

Go to the source code of this file.

Classes
struct	printreg

Macros
#define	REGINFO(label, name, size)   {label, U##size##_##name, size}

Functions
void	checkVersion (volatile epicsUInt8 *base, const MRFVersion &required, const MRFVersion &recommended)
epicsStatus	mrmEvgSetupVME (const char *id, epicsInt32 slot, epicsUInt32 vmeAddress, epicsInt32 irqLevel, epicsInt32 irqVector)
epicsStatus	mrmEvgSetupPCI (const char *id, const char *spec, int d, int f)
	epicsExportRegistrar (evgMrmRegistrar)
	epicsExportAddress (drvet, drvEvgMrm)

Macro Definition Documentation

REGINFO

#define REGINFO	(		label,
			name,
			size
	)		{label, U##size##_##name, size}

Function Documentation

checkVersion()

void checkVersion	(	volatile epicsUInt8 *	base,
		const MRFVersion &	required,
		const MRFVersion &	recommended
	)

Definition at line 165 of file evgInit.cpp.

{
    epicsUInt32 type;
    epicsUInt32 v = READ32(base, FPGAVersion);

    type = v & FPGAVersion_TYPE_MASK;
    type = v >> FPGAVersion_TYPE_SHIFT;

    if(type != 0x2)
        throw std::runtime_error("Address does not correspond to an EVG");

    MRFVersion ver(v);

    if(ver < required) {
        std::ostringstream msg;
        msg<<"Firmware version >= "<<required<<" is required\n";
        throw std::runtime_error(msg.str());

    } else if(ver < recommended) {
        std::cout<<"Firmware version >= "<<recommended<<" is recommended, please consider upgrading\n";
    }
}

epicsExportAddress()

epicsExportAddress	(	drvet	,
		drvEvgMrm
	)

epicsExportRegistrar()

epicsExportRegistrar

(

evgMrmRegistrar

)

mrmEvgSetupPCI()

epicsStatus mrmEvgSetupPCI	(	const char *	id,
		const char *	spec,
		int	d,
		int	f
	)

Definition at line 365 of file evgInit.cpp.

{
    if(d!=0 || f!=0) {
        std::istringstream strm(spec);
        unsigned B =0xf;
        strm >> B;
        char buf[40];
        epicsSnprintf(buf, sizeof(buf), "%x:%x.%x", B, d, f);
        buf[sizeof(buf)-1] = '\0';
        spec = epicsStrDup(buf);
        fprintf(stderr, "Deprecated call.  Replace with:\n"
                        "  mrmEvgSetupPCI(\"%s\", \"%s\")\n",
                id, spec);
    }

    try {
        if (mrf::Object::getObject(id)) {
            printf("ID %s already in use\n", id);
            return -1;
        }

        /* Linux only
         * kernel driver interface version.
         * 0 - Broken
         * 1 - Use of irqcontrol callback to avoid races for plx pci bridges
         * 2 - Use of new PCI master enable register to avoid races for soft pci bridges
         */
        int kifacever = -1;
        if(checkUIOVersion(1,2,&kifacever))
            return -1;

        /* Find PCI device from devLib2 */
        const epicsPCIDevice *cur = 0;
        if (devPCIFindSpec(mrmevgs, spec, &cur, 0)) {
            printf("PCI Device not found\n");
            return -1;
        }

        bus_configuration bus;

        bus.busType = busType_pci;
        bus.pci.dev = cur;

        printf("Device %s  %x:%x.%x\n", id, cur->bus, cur->device,
               cur->function);
        printf("Using IRQ %u\n", cur->irq);

        /* MMap BAR0(plx) and BAR2(EVG)*/
        volatile epicsUInt8 *BAR_plx, *BAR_evg;

        if (devPCIToLocalAddr(cur, 0, (volatile void**) (void *) &BAR_plx, 0)) {
            printf("Failed to map BARs 0\n");
            return -1;
        }
        if (!BAR_plx) {
            printf("BAR0 mapped to zero? (%08lx)\n",
                         (unsigned long) BAR_plx);
            return -1;
        }

        switch(cur->id.device) {
        case PCI_DEVICE_ID_PLX_9030: /* cPCI-EVG-220 and cPCI-EVG-230 */
            if (devPCIToLocalAddr(cur, 2, (volatile void**) (void *) &BAR_evg, 0)) {
                printf("Failed to map BARs 2\n");
                return -1;
            }
            if (!BAR_evg) {
                printf("BAR2 mapped to zero? (%08lx)\n",
                             (unsigned long) BAR_evg);
                return -1;
            }

#if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
            BITSET(LE,32, BAR_plx, LAS0BRD, LAS0BRD_ENDIAN);
#elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE
            BITCLR(LE,32, BAR_plx, LAS0BRD, LAS0BRD_ENDIAN);
#endif
            break;
        case PCI_DEVICE_ID_MRF_CPCIEVG300:
        case PCI_DEVICE_ID_XILINX_DEV:
            BAR_evg = BAR_plx;
            /* the endianness the 300 series devices w/o PLX bridge
             * is a little tricky to setup.  byte order swapping is controlled
             * through the EVR's Control register and access to this register
             * is subject to byte order swapping...
             */

            // Disable EVG and set's byte order to big endian
            NAT_WRITE32(BAR_evg, Control, 0);
            // Disable reception, and enable byte order swapping if necessary
#if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
            BE_WRITE32(BAR_evg, Control, 0x70000000);
#elif EPICS_BYTE_ORDER == EPICS_ENDIAN_LITTLE
            BE_WRITE32(BAR_evg, Control, 0x72000000);
#endif

            break;
        default:
            printf("Unknown/unsupported PCI device 0x%04x\n", (unsigned)cur->device);
            return -1;
        }

        printf("FPGA version: %08x\n", READ32(BAR_evg, FPGAVersion));
        checkVersion(BAR_evg, MRFVersion(0, 3, 0), MRFVersion(0, 8, 0));

        /*Disable the interrupts and enable them at the end of iocInit via initHooks*/
        WRITE32(BAR_evg, IrqFlag, READ32(BAR_evg, IrqFlag));
        WRITE32(BAR_evg, IrqEnable, 0);

        const evgMrm::Config *conf = &conf_pci_misc;

        if(cur->id.device==PCI_DEVICE_ID_MRF_CPCIEVG300) {
            conf = &conf_cpci_evg_300;
        } else switch(cur->id.sub_device) {
        case PCI_SUBDEVICE_ID_MRF_PXIEVG_220: conf = &conf_cpci_evg_220; break;
        case PCI_DEVICE_ID_MRF_PXIEVG230: conf = &conf_cpci_evg_230; break;
        case PCI_DEVICE_ID_MRF_MTCA_EVM_300: conf = &conf_mtca_evm_300; break;
        }

        printf("%s #Inputs FP:%u UV:%u RB:%u\n", conf->model, conf->numFrontInp,
               conf->numUnivInp, conf->numRearInp);

        evgMrm* evg = new evgMrm(id, conf, bus, BAR_evg, cur);

        MRFVersion ver(evg->version());

#if !defined(__linux__) && !defined(_WIN32)
        if(cur->id.device==PCI_DEVICE_ID_PLX_9030) {
            // Enable active high interrupt1 through the PLX to the PCI bus.
            LE_WRITE16(BAR_plx, INTCSR, INTCSR_INT1_Enable| INTCSR_INT1_Polarity| INTCSR_PCI_Enable);
        }
        if(ver>=MRFVersion(0, 8, 0)) {
            // RTOS doesn't need this, so always enable
            WRITE32(BAR_evg, PCI_MIE, EVG_MIE_ENABLE);
        }
#else
        if(ver>=MRFVersion(0, 8, 0) && kifacever>=2) {
            // PCI master enable supported by firmware and kernel module.
            // the kernel will set this bit when devPCIEnableInterrupt() is called
        } else if(cur->id.device==PCI_DEVICE_ID_PLX_9030) {
            // PLX based devices don't need special handling
            WRITE32(BAR_evg, PCI_MIE, EVG_MIE_ENABLE);
        } else if(ver<MRFVersion(0, 8, 0)) {
            // old firmware and (maybe) old kernel module.
            // this will still work, so just complain
            printf("Warning: this configuration of FW and SW is known to have race conditions in interrupt handling.\n"
                         "         Please consider upgrading to FW version 8.\n");
            if(kifacever<2)
                printf("         Also upgrade the linux kernel module to interface version 2.");
        } else if(ver>=MRFVersion(0, 8, 0) && kifacever<2) {
            // New firmware w/ old kernel module, this won't work
            throw std::runtime_error("FW version 8 for this device requires a linux kernel module w/ interface version 2");
        } else {
            throw std::logic_error("logic error in FW/kernel module compatibility check.");
        }
        if(devPCIEnableInterrupt(cur)) {
            printf("Failed to enable interrupt\n");
            return -1;
        }
#endif

        int ret;
        /*Connect Interrupt handler to isr thread*/
        if ((ret=devPCIConnectInterrupt(cur, &evgMrm::isr_pci, (void*) evg, 0))!=0) {
            char buf[80];
            errSymLookup(ret, buf, sizeof(buf));
            printf("ERROR:Failed to connect PCI interrupt. err (%d) %s\n", ret, buf);
            delete evg;
            return -1;
        } else {
            // By default the IRQPollers for EVRU/D are disabled.
            // __IRQP_EVRU/D_PRD selects the polling perdiod [s] and enables the equivalent EVM embedded EVR.
#ifdef __IRQP_EVRU_PRD
            new IRQPoller(&EVRMRM::isr_poll, static_cast<void *>(evg->getEvruMrm()), __IRQP_EVRU_PRD);
#endif
#ifdef __IRQP_EVRD_PRD
            new IRQPoller(&EVRMRM::isr_poll, static_cast<void *>(evg->getEvrdMrm()), __IRQP_EVRD_PRD);
#endif
            printf("PCI interrupt connected!\n");
        }

        return 0;

    } catch (std::exception& e) {
        printf("Error: %s\n", e.what());
    }
    return -1;
} //mrmEvgSetupPCI

mrmEvgSetupVME()

epicsStatus mrmEvgSetupVME	(	const char *	id,
		epicsInt32	slot,
		epicsUInt32	vmeAddress,
		epicsInt32	irqLevel,
		epicsInt32	irqVector
	)

Definition at line 191 of file evgInit.cpp.

{
    volatile epicsUInt8* regCpuAddr = 0;
    struct VMECSRID info;
    bus_configuration bus;

    info.board = 0; info.revision = 0; info.vendor = 0;

    bus.busType = busType_vme;
    bus.vme.slot = slot;
    bus.vme.address = vmeAddress;
    bus.vme.irqLevel = irqLevel;
    bus.vme.irqVector = irqVector;

    try {
        if(mrf::Object::getObject(id)){
            printf("ID %s already in use\n",id);
            return -1;
        }

        /*csrCpuAddr is VME-CSR space CPU address for the board*/
        volatile unsigned char* csrCpuAddr =
                devCSRTestSlot(vmeEvgIDs,slot,&info);

        if(!csrCpuAddr) {
            printf("No EVG in slot %d\n",slot);
            return -1;
        }

        printf("##### Setting up MRF EVG in VME Slot %d #####\n",slot);
        printf("Found Vendor: %08x\nBoard: %08x\nRevision: %08x\n",
               info.vendor, info.board, info.revision);

        epicsUInt32 xxx = CSRRead32(csrCpuAddr + CSR_FN_ADER(1));
        if(xxx)
            printf("Warning: EVG not in power on state! (%08x)\n", xxx);

        /*Setting the base address of Register Map on VME Board (EVG)*/
        CSRSetBase(csrCpuAddr, 1, vmeAddress, VME_AM_STD_SUP_DATA);

        {
            epicsUInt32 temp=CSRRead32((csrCpuAddr) + CSR_FN_ADER(1));

            if(temp != CSRADER((epicsUInt32)vmeAddress,VME_AM_STD_SUP_DATA)) {
                printf("Failed to set CSR Base address in ADER1.  Check VME bus and card firmware version.\n");
                return -1;
            }
        }

        /* Create a static string for the card description (needed by vxWorks) */
        char *Description = allocSNPrintf(40, "EVG-%d '%s' slot %d",
                                          info.board & MRF_BID_SERIES_MASK,
                                          id, slot);

        /*Register VME address and get corresponding CPU address */
        int status = devRegisterAddress (
                    Description,                           // Event Generator card description
                    atVMEA24,                              // A24 Address space
                    vmeAddress,                            // Physical address of register space
                    EVG_REGMAP_SIZE,                       // Size of card's register space
                    (volatile void **)(void *)&regCpuAddr  // Local address of card's register map
                    );

        if(status) {
            printf("Failed to map VME address %08x\n", vmeAddress);
            return -1;
        }

        {
            epicsUInt32 junk;
            if(devReadProbe(sizeof(junk), (volatile void*)(regCpuAddr+U32_FPGAVersion), (void*)&junk)) {
                printf("Failed to read from MRM registers (but could read CSR registers)\n");
                return -1;
            }
        }
        printf("FPGA version: %08x\n", READ32(regCpuAddr, FPGAVersion));
        checkVersion(regCpuAddr, MRFVersion(0, 3, 0), MRFVersion(0, 3, 0));

        const evgMrm::Config *conf = &conf_vme_evg_230;

        printf("%s #Inputs FP:%u UV:%u RB:%u\n", conf->model, conf->numFrontInp,
               conf->numUnivInp, conf->numRearInp);

        evgMrm* evg = new evgMrm(id, conf, bus, regCpuAddr, NULL);

        if(irqLevel > 0 && irqVector >= 0) {
            /*Configure the Interrupt level and vector on the EVG board*/
            CSRWrite8(csrCpuAddr + MRF_UCSR_DEFAULT + UCSR_IRQ_LEVEL, irqLevel&0x7);
            CSRWrite8(csrCpuAddr + MRF_UCSR_DEFAULT + UCSR_IRQ_VECTOR, irqVector&0xff);

            printf("IRQ Level: %d\nIRQ Vector: %d\n",
                   CSRRead8(csrCpuAddr + MRF_UCSR_DEFAULT + UCSR_IRQ_LEVEL),
                   CSRRead8(csrCpuAddr + MRF_UCSR_DEFAULT + UCSR_IRQ_VECTOR)
                   );


            printf("csrCpuAddr : %p\nregCpuAddr : %p\n",csrCpuAddr, regCpuAddr);

            /*Disable the interrupts and enable them at the end of iocInit via initHooks*/
            WRITE32(regCpuAddr, IrqFlag, READ32(regCpuAddr, IrqFlag));
            WRITE32(regCpuAddr, IrqEnable, 0);

            // VME IRQ level will be enabled later during iocInit()
            vme_level_mask |= 1 << ((irqLevel&0x7)-1);

            /*Connect Interrupt handler to vector*/
            if(devConnectInterruptVME(irqVector & 0xff, &evgMrm::isr_vme, evg)){
                printf("ERROR:Failed to connect VME IRQ vector %d\n"
                             ,irqVector&0xff);
                delete evg;
                return -1;
            }
        }

        errlogFlush();
        return 0;
    } catch(std::exception& e) {
        printf("Error: %s\n",e.what());
    }
    errlogFlush();
    return -1;
} //mrmEvgSetupVME